Principal / Lead Analog Mixed Signal Design Engineer

• *Description**

• *Invent the future with us.**

Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high\-performance, energy efficient AI compute.

As a pioneer in the new frontier of energy efficient high\-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications.

Join us at Ampere and work alongside a passionate and growing team \- we’d love to have you apply!

• *About the role:**

We’re seeking a Principal / Lead Analog Mixed\-Signal Design Engineer to drive high‑impact, high‑visibility analog IP for next‑generation AI, cloud, and edge applications. You will own critical power‑management and analog IP from concept to production, lead cross‑functional teams, mentor engineers, and influence roadmap and make/buy decisions.

• *What you’ll achieve:**

• Own end‑to‑end design of LDOs, buck/multiphase converters, references, op‑amps/OTAs, comparators, and current/thermal sensors.
• Define specs with system architects and AI hardware teams; translate workloads into efficiency, transient response, ripple, PSRR, noise, and reliability targets.
• Drive architecture and control strategies, loop compensation, and stability across PVT and load conditions.
• Build behavioral models (Verilog‑A/AMS), run AMS co‑sims, corners, and noise analyses.
• Guide layout and physical integration, substrate noise isolation, and ESD/latch‑up robustness; partner with SoC PD/package/PDN teams.
• Lead silicon bring‑up, test plans, debug/root cause, and close on yield and variation.
• Establish best practices and mentor the team; report progress and trade‑offs to leadership.

• *About you:**

• Bachelor's degree with 8\+ years or Master’s degree with 6\+ years of experience in analog/mixed‑signal design with a strong record of productized IPs /SoCs; 3\+ years leading projects or teams.
• Deep expertise in power‑management/precision circuits and load‑transient optimization, protection, and telemetry.
• Strong command of noise, PSRR, and stability/compensation.
• Skilled in variation/reliability (PVT, mismatch, corners/Monte Carlo, aging) and post‑silicon correlation.
• Experience in advanced CMOS processes; understanding of package/PDN co‑design.
• Proficient with Cadence Virtuoso, Spectre, and scripting (Python/SKILL).
• Excellent cross‑functional communication.

• *What we’ll offer:**

At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long\-term incentive, and comprehensive benefits.

Benefits highlights include:* Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work.

• Generous paid time off policy so that you can embrace a healthy work\-life balance
• Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day.

And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.

Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.