Senior Design Lead

Bangalore, Karnataka

Job Summary

We are looking for a skilled Standard Cell Characterization Engineer to work on library characterization and model generation for advanced CMOS/FinFET technologies. The role involves generating high\-quality Liberty (.lib) files, collaborating with design and layout teams, and supporting automation and validation of characterization flows.

Key Responsibilities

Key Responsibilities

• *Perform standard cell library characterization and generate:**

Timing, power, noise, and variation models

Accurate Liberty (.lib) files

• *Develop understanding and support for:**

Circuit design and layout interactions

View generation and automation flows

Execute SPICE simulations and analyze characterization results

Generate extracted netlists from layout and perform characterization

Validate libraries through QA checks and consistency verification

• *Work with different collateral views:**

GDS, .lib, Verilog (.v), IBIS (.ibs), .db, etc.

Collaborate with design, layout, and CAD teams for end\-to\-end delivery

Skill Requirements

Required Skills (Must\-Have)

Basic understanding of CMOS and FinFET device characteristics

Basic knowledge of digital circuit design (combinational \& sequential)

Hands\-on experience with SPICE simulations

Strong understanding of library characterization concepts, including

Timing, noise, power, and variation models

• *Solid knowledge of:**

NLDM (Non\-Linear Delay Model)

CCS (Composite Current Source Model)

Knowledge of .lib generation and characterization flow

Familiarity with collateral views (GDS, .lib, Verilog, IBIS, .db)

• *Ability to:**

Generate extracted netlists

Perform post\-layout characterization

• *Understanding of:**

Library validation and quality checks (QA)

• *Strong proficiency in scripting:**

Linux, Perl, Python, Tcl

Other Requirements

Desired Skills (Good\-to\-Have)

• *Exposure to:**

Noise and LVF characterization / dot\_lib generation

APL characterization and modeling

Knowledge of deep submicron process challenges

Hands\-on experience in advanced nodes ( 16nm, FinFET)

Good communication and teamwork skills

Positive learning attitude and adaptability

Education \& Experience

B.Tech / M.Tech in Electronics / VLSI / related field with 3–10 years of experience in Standard cell characterization / view generation

Keywords

Standard Cell Characterization, Liberty (.lib), SPICE Simulation, CMOS, FinFET, NLDM, CCS, LVF, Timing Models, Power Models, SiliconSmart, Liberate, View Generation, QA Validation

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