Senior RTL Design Engineer at HCLTech — Bengaluru | Apply 2026 | 3rangaH
Senior RTL Design Engineer
Full-timevia indeed
Job Description
Senior RTL Design Engineer
Bengaluru, Karnataka
- *Job Summary**
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RTL Design Engineers design and develop digital hardware blocks using HDLs such as Verilog/SystemVerilog/VHDL for ASIC or FPGA projects.
- *Key Responsibilities**
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- Develop RTL code for digital IPs, SoCs, and subsystems
- Create microarchitecture specifications from system requirements
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Optimize designs for area, power, and performancePerform linting, CDC, and synthesis checksCollaborate with DV, DFT, and Physical Design teamsDebug functional issues and timing\-related problemsSupport FPGA prototyping and silicon bring\-up*Skill Requirements**---------------------- Verilog/SystemVerilog/VHDL
- Digital design fundamentals
- FSMs, pipelines, memories, buses, clocking concepts
- Scripting: Python/Perl/TCL/Shell
- Tools: Synopsys DC, SpyGlass, Verdi, VCS
- *Other Requirements**
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- AMBA protocols (AXI/AHB/APB)
- Low\-power design concepts (UPF/CPF)
- ASIC/FPGA flow understanding
Job Overview
- Job type
- Full-time
- Work mode
- On-site
- Location
- Bengaluru
- Posted
- 1d ago
- Source
- Indeed