Staff Engineer, ASIC STA

• *Our vision is to transform how the world uses information to enrich life for** ***all*** **.**

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

• *Micron Technology’s vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community.**

• *Role:**

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The team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group. Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities.

Requirements

• *Skills Required**

• 8\-14 years of relevant experience in Synthesis/STA
• Good understanding of overall design Flow RTL to GDS.
• Hands on Experience on Constraints Generation, timing closure of full chip on Hierarchical Designs
• Hand on Synthesis \& STA Experience on Lower node Technologies with Synopsys/Cadence Tools.
• Hands on Experience on Equivalent Checks with Synopsys / Cadence Tools.
• Good knowledge on Timing Budgets.
• Knowledge on Perl / TCL / Python scripting language
• Experience on multi voltage designs using CPF/UPF.
• Hands on experience on power analysis using PTPX
• Good understanding of VHDL / Verilog Constructs.

• *Responsibilities**

• Responsible for Block/ Chip Tile Synthesis to achieve the best PPA.
• Constraint Generation \& Timing closure for Block and Full Chip SOC for complex hierarchical Designs for all the Modes.
• Interaction with Design, DFT, IP\&PD teams for Timing Convergence \& Resolving Constraint Conflicts .
• Able to work on low power Intent \& verify low power intent with minimal supervision.
• Responsible for Logical equivalence checks \& Low Power Checks.
• Early RTL analysis for Clocking, Power , DFT coverage \& suggestions to Designer on the improvements.
• Support Verification team to enable GLS.

• *Preferred Skills:**

• Strong verbal communication skills

• Cadence PnR tools

• Formal verification experience

• Digital electronics and microprocessors experience

• *About Micron Technology, Inc.**

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life *for all* . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high\-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport\_india@micron.com

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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