IP Verification Engineer

• *Job Details:**

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• *Job Description:**
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The Role and Impact

As an IP Design Verification Engineer, you will play a pivotal role in shaping the success of our cutting\-edge products by ensuring the reliability and functionality of our IP designs. Your contributions will directly impact Intel's ability to deliver high\-quality, innovative solutions that power the next generation of technology. From crafting verification plans to debugging complex issues, your efforts will drive the design process forward, ensuring every IP meets the highest standards. Join our team to collaborate with industry\-leading engineers and make a tangible difference in the world of technology.

Key Responsibilities

• Develop and execute comprehensive IP verification plans that align with microarchitecture specifications.
• Design and maintain test benches and verification environments to ensure thorough coverage and robust functional testing.
• Perform system simulation modeling to verify design functionality, timing, and power efficiency, while identifying and resolving design bugs.
• Collaborate closely with architects, RTL developers, and physical design teams to define requirements and improve verification processes.
• Analyze failing tests, root cause issues in the presilicon environment, and implement corrective actions to ensure design accuracy.
• Document test plans and lead technical reviews to align stakeholders and improve the overall verification strategy.
• Maintain and enhance existing functional verification infrastructure, ensuring efficiency and adaptability to evolving methodologies.
• Participate in defining verification methodologies, infrastructure, and related tools to meet functional design verification needs.
• *Qualifications:**
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Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 2\+ years of experience in IP design verification with a Bachelor's degree, or 1\+ years of experience with a Master's degree.
• Proficiency in System Verilog and familiarity with OVM or UVM\-based verification methodologies.
• Strong knowledge of Design for Verification (DFV) techniques and IP test writing frameworks.
• Proven ability to debug and resolve issues in complex pre silicon environments.

Preferred Qualifications

• Master's degree in a relevant field with coursework or projects in hardware design or verification.
• Hands\-on experience with scripting languages for automation and verification tools.
• Strong problem\-solving skills and the ability to work effectively in a collaborative, multidisciplinary environment.
• Excellent communication and organizational skills, with a commitment to delivering high\-quality results.

We are excited to welcome passionate engineers who thrive in innovative and collaborative environments. If you're ready to take the next step in your career, apply today and become part of a team that is transforming the future of technology.

• *Job Type:**
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College Grad

• *Shift:**
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Shift 1 (India)

• *Primary Location:**
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India, Bangalore

• *Additional Locations:**
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• *Business group:**
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The Central Engineering Group (CEG) is Intel's data\-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer\-driven, end\-to\-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

• *Posting Statement:**
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All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

• *Position of Trust**
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N/A

• *Work Model for this Role**

This role will require an on\-site presence. \* Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.