Senior Circuit Verification Engineer (SPICE / FastSPICE)

We are looking for an experienced **Senior Circuit Verification Engineer** with strong expertise in **analog/mixed\-signal verification, SPICE/FastSPICE simulation, and circuit characterization**.

The ideal candidate should have hands\-on experience in pre\-layout and post\-layout verification, timing validation, reliability analysis, and automation using Python to support simulation workflows.

Key Responsibilities

• Perform **block\-level SPICE/FastSPICE simulations** for analog and mixed\-signal circuits
• Execute **pre\-layout and post\-layout simulations** including extracted parasitic analysis (R, C, L, coupling capacitance)
• Conduct **DC, transient, PVT corner, Monte Carlo, and mismatch simulations**
• Perform reliability verification including:
• Electromigration (EM)
• IR Drop
• ESD
• BTI / Aging Analysis
• Develop and validate **memory schematics and building block schematics**
• Perform **circuit characterization, timing validation, and timing library generation**
• Execute **Verilog MOS switch\-level modeling** and gate\-level simulations
• Debug simulation failures and identify root causes at circuit level
• Collaborate with layout and design teams to improve performance and reduce parasitic impact
• Develop **Python\-based automation scripts** for simulation execution, data extraction, and reporting

Required Skills

• Python
• SPICE / FastSPICE Simulation
• Circuit Simulation \& Verification
• Analog / Mixed\-Signal Verification
• DC \& Transient Analysis
• PVT Corner Analysis
• Monte Carlo \& Mismatch Simulation
• Memory Schematics \& Building Block Verification
• Circuit Characterization \& Timing Libraries
• Verilog MOS Switch\-Level Modeling
• Gate\-Level Simulation \& Debugging
• Latch\-Based Design Verification
• EM / IR Drop / ESD / BTI Analysis

Preferred Candidate

• 5–9 years of relevant semiconductor / VLSI verification experience
• Immediate joiners or candidates with notice period up to 15 days preferred
• Candidates with career gaps may also apply
• Strong debugging and analytical skills
• Experience working in circuit verification and validation environments

Pay: ₹1,000,000\.00 \- ₹1,600,000\.00 per year

Work Location: In person